diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index c63999a..05bdf56 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -37,6 +37,7 @@
 obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
 obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
 obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o
+obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o
 
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/drivers/serial/serial_stm32x7.c b/drivers/serial/serial_stm32x7.c
new file mode 100644
index 0000000..cfbfab7
--- /dev/null
+++ b/drivers/serial/serial_stm32x7.c
@@ -0,0 +1,83 @@
+/*
+ * (C) Copyright 2016
+ * Vikas Manocha, <vikas.manocha@st.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <serial.h>
+#include <dm/platform_data/serial_stm32x7.h>
+#include "serial_stm32x7.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
+{
+	struct stm32x7_serial_platdata *plat = dev->platdata;
+	struct stm32_usart *const usart = plat->base;
+	writel(plat->clock/baudrate, &usart->brr);
+
+	return 0;
+}
+
+static int stm32_serial_getc(struct udevice *dev)
+{
+	struct stm32x7_serial_platdata *plat = dev->platdata;
+	struct stm32_usart *const usart = plat->base;
+
+	if ((readl(&usart->sr) & USART_SR_FLAG_RXNE) == 0)
+		return -EAGAIN;
+
+	return readl(&usart->rd_dr);
+}
+
+static int stm32_serial_putc(struct udevice *dev, const char c)
+{
+	struct stm32x7_serial_platdata *plat = dev->platdata;
+	struct stm32_usart *const usart = plat->base;
+
+	if ((readl(&usart->sr) & USART_SR_FLAG_TXE) == 0)
+		return -EAGAIN;
+
+	writel(c, &usart->tx_dr);
+
+	return 0;
+}
+
+static int stm32_serial_pending(struct udevice *dev, bool input)
+{
+	struct stm32x7_serial_platdata *plat = dev->platdata;
+	struct stm32_usart *const usart = plat->base;
+
+	if (input)
+		return readl(&usart->sr) & USART_SR_FLAG_RXNE ? 1 : 0;
+	else
+		return readl(&usart->sr) & USART_SR_FLAG_TXE ? 0 : 1;
+}
+
+static int stm32_serial_probe(struct udevice *dev)
+{
+	struct stm32x7_serial_platdata *plat = dev->platdata;
+	struct stm32_usart *const usart = plat->base;
+	setbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
+
+	return 0;
+}
+
+static const struct dm_serial_ops stm32_serial_ops = {
+	.putc = stm32_serial_putc,
+	.pending = stm32_serial_pending,
+	.getc = stm32_serial_getc,
+	.setbrg = stm32_serial_setbrg,
+};
+
+U_BOOT_DRIVER(serial_stm32) = {
+	.name = "serial_stm32x7",
+	.id = UCLASS_SERIAL,
+	.ops = &stm32_serial_ops,
+	.probe = stm32_serial_probe,
+	.flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/serial/serial_stm32x7.h b/drivers/serial/serial_stm32x7.h
new file mode 100644
index 0000000..6190d67
--- /dev/null
+++ b/drivers/serial/serial_stm32x7.h
@@ -0,0 +1,37 @@
+/*
+ * (C) Copyright 2016
+ * Vikas Manocha, <vikas.manocha@st.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _SERIAL_STM32_X7_
+#define _SERIAL_STM32_X7_
+
+struct stm32_usart {
+	u32 cr1;
+	u32 cr2;
+	u32 cr3;
+	u32 brr;
+	u32 gtpr;
+	u32 rtor;
+	u32 rqr;
+	u32 sr;
+	u32 icr;
+	u32 rd_dr;
+	u32 tx_dr;
+};
+
+
+#define USART_CR1_RE			(1 << 2)
+#define USART_CR1_TE			(1 << 3)
+#define USART_CR1_UE			(1 << 0)
+
+#define USART_SR_FLAG_RXNE		(1 << 5)
+#define USART_SR_FLAG_TXE		(1 << 7)
+
+#define USART_BRR_F_MASK		0xFF
+#define USART_BRR_M_SHIFT		4
+#define USART_BRR_M_MASK		0xFFF0
+
+#endif
diff --git a/include/dm/platform_data/serial_stm32x7.h b/include/dm/platform_data/serial_stm32x7.h
new file mode 100644
index 0000000..328a8a3
--- /dev/null
+++ b/include/dm/platform_data/serial_stm32x7.h
@@ -0,0 +1,17 @@
+/*
+ * (C) Copyright 2016
+ * Vikas Manocha, <vikas.manocha@st.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __SERIAL_STM32x7_H
+#define __SERIAL_STM32x7_H
+
+/* Information about a serial port */
+struct stm32x7_serial_platdata {
+	struct stm32_usart *base;  /* address of registers in physical memory */
+	unsigned int clock;
+};
+
+#endif /* __SERIAL_STM32x7_H */